Prior art microprocessors commonly implement a y-bit full-adder ("FA") as part of an execution unit to generate a y-bit branch address during an address branch instruction operation. Additionally, the execution unit also includes a y-bit incrementer to operate as a program counter ("PC") for generating a next y-bit PC address as a next execution address. For example, as illustrated in FIG. 1, a 44-bit FA 20 receives an input 44-bit current PC 31, Current.sub.-- PC 43 . . . 0!, which is added to a 44-bit sign extended offset 22, Ext.sub.-- Offset 43 . . . 0!, to generate an output 44-bit branch address 24, Branch.sub.-- Addr 43 . . . 0!. An adder carryout bit 23, Addr.sub.-- CO, is also provided as an output of the FA 20 to provide overflow information. Sign extended offset 22 typically comprises a 16-bit word offset portion comprising input bits Ext.sub.-- Offset 15 . . . 0!, and a 28bit word sign extended portion comprising Ext.sub.-- Offset 43 . . . 16! . The remaining 28 bits, Ext.sub.-- Offset 43 . . . 16!, are typically set to correspond to a logical value of bit Ext.sub.-- Offset &lt;15&gt;, such that, e.g., if Ext.sub.-- Offset&lt;15&gt;is equivalent to a logical "1", every bit of the set of bits Ext.sub.-- Offset 43 . . . 16! is set equivalent to a logical "1", and if Ext.sub.-- Offset&lt;15&gt;is equivalent to a logical "0", every bit of the set of bits Ext.sub.-- Offset 43 . . . 16! is set equivalent to a logical "0"to thereby provide a full 44-bit word to an input of the 44-bit FA 20. Incrementer 30 operates as a 44-bit program counter to increment a 44-bit input PC 31, Current.sub.-- PC 43 . . . 0!, and to provide a 44-bit output PC 32, Next.sub.-- PC 43 . . . 0!, together with an output increment carryout bit 33.
A y-bit full adder, a y-bit incrementer (and a y-bit decrementer) are well known basic circuits commonly used in the art of circuit design, and it is also well known that, of these circuits, the full adders are slower and more complicated and thus require more real estate to implement on an integrated circuit than a basic incrementer or a decrementer circuit. However, because advanced microprocessor are increasingly designed with more functions, while still required to minimize real estate, there is therefore a need to provide an efficient means to include the functionality of both the full-adder circuit and the incrementer, while reducing the real estate consumption to provide these combined functions.